As DRAMs increase in memory cell density, there is a continuous challenge to maintain sufficiently high storage capacitance despite decreasing cell area. A principal way of increasing cell capacitance is through cell structure techniques. Such techniques include three dimensional cell capacitors such as trenched or stacked capacitors. This invention concerns stacked capacitor cell constructions employing conductively doped polysilicon as one of the storage nodes. This invention also concerns semiconductor processing methods of producing isolated polysilicon lined cavities.